PicoSDR 4×4软件定义无线电硬件

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PicoSDR 4×4软件定义无线电硬件

Key Features:

Prototyping is easier than ever with this new 4×4 MIMO SDR platform, with 4 channels perfectly synchronized on one FPGA. Use Simulink to leverage the power of a large Virtex FPGA without writing a single line of HDL code. 70 MHz to 6 GHz on one single radio: Unlock the full performance of the AD9361 across all frequency bands.

• 4×4 in one single FPGA perfectly synchronized
• Fully integrated with Matlab Simulink and Xilinx System Generator (model-based design tools)
• AD9361 Radio Frequency Integrated Circuit (RFIC)
• Software defined up to 6 GHz and 56 MHz BW
• GNU Radio Support
• Small form factor: 215 mm x 48 mm x 290 mm
• Embedded Linux PC: connect remotely from any computer or run standalone
• Plug-and-play, with Ethernet, PCI Express and VITA-49 Radio Transport Protocol (VRT)
• Low Latency (75 μs roundtrip) and high speed (10 Gbps) PCIe interface
• QAM64 OFDM Ref Design*